1. Field of the Invention
The present invention relates to a receiving apparatus suitable for a CDMA (Code Division Multiple Access) type cellular telephone system, a receiving method thereof, and a terminal unit for use with a radio system thereof.
2. Description of the Related Art
In recent years, a CDMA type cellular telephone system has become attractive. In the CDMA type cellular telephone system, a pseudo-random code is used as a spread code. A carrier of a transmission signal is spectrum-spread. The pattern and phase of each spread code in the code sequence are varied so as to perform a multiple access.
In the CDMA system, the spectrum spread method is used. In the spectrum spread system, when data is transmitted, the carrier is primarily modulated with the transmission data. In addition, the carrier that has been primarily modulated is multiplied by a PN (Pseudorandom Noise) code. Thus, the carrier is modulated with the PN code. As an example of the primarily modulating method, balanced QPSK modulating method is used. Since the PN code is a random code, when the carrier is modulated by the PN code, the frequency spectrum is widened. When data is received, the received data is multiplied by the same PN code that has been modulated on the transmission side. When the same PN code is multiplied and the phase is matched, the received data is de-spread.
In the spectrum spread method, to de-spread the received signal, the same PN code that has been modulated on the transmission side is required for both the pattern and the phase. Thus, when the pattern and the phase of the PN code are varied, the multiple access can be performed. The method for varying the pattern and the phase of each spread code in the code sequence and thereby performing the multiple access is referred to as CDMA method.
As cellular telephone systems, an FDMA (Frequency Division Multiple Access) system and a TDMA (Time Division Multiple Access) system have been used.
However, the FDMA system and the TDMA system cannot deal with a drastic increase of the number of users.
In other words, in the FDMA system, the multiple access is performed on different frequency channels. In an analog cellular telephone system, the FDMA system is usually used.
However, in the FDMA system, since the frequency use efficiency is bad, a drastic increase of the number of users tends to cause channels to run short. When the intervals of channels are narrowed for the increase of the number of channels, the adjacent channels adversely interfere with each other and thereby the sound quality deteriorates.
In the TDMA system, the transmission data is compressed on the time base. Thus, the use time is divided and thereby the same frequency is shared. The TDMA system has been widely used as a digital cellular telephone system. In the TDMA system, the frequency use efficiency is improved in comparison with the simple FDMA system. However, in the TDMA system, the number of channels is restricted. Thus, it seems that as the number of users drastically increases, the number of channels runs short.
On the other hand, in the CDMA system, the frequency use efficiency improves and more channels can be obtained.
As described above, in the spectrum spreading system, when a signal is transmitted, it is modulated corresponding to for example BQPSK (Balanced Quadrature Phase Shift Keying) method. In addition, a carrier is multiplied by a PN code. Thus, the signal is spectrum-spread. When a signal is received, it is de-spread with the same PN code that has been used on the transmitter side.
FIG. 1 shows a spreading process on the transmitter side in the case that a signal is modulated and spread corresponding to the BQPSK method. In FIG. 1, input data received from an input terminal 120 is separated into data of I channel and data of Q channel. The data of I channel is supplied to a multiplying circuit 123. The data of Q channel is supplied to a multiplying circuit 124.
A PN code generating circuit 121 supplies a PN code of I channel PNI to the multiplying circuit 123. The multiplying circuit 123 multiplies the data of I channel received from the input terminal 120 by the PN code of I channel PNI received from the PN code generating circuit 121. Output data of the multiplying circuit 123 is supplied to a multiplying circuit 127.
A PN code generating circuit 122 supplies a PN code of Q channel PNQ to the multiplying circuit 124. The multiplying circuit 124 multiplies data received from the input terminal 120 by the PN code of Q channel PNQ received from the PN code generating circuit 122. Output data of the multiplying circuit 124 is supplied to a multiplying circuit 128.
A signal generating circuit 125 generates a carrier signal and supplies the carrier signal to the multiplying circuit 128. In addition, the signal generating circuit 125 supplies the carrier signal to the multiplying circuit 128 through a .pi./2 phase shifting circuit 126. The multiplying circuit 127 multiplies output data of the multiplying circuit 123 by the carrier signal received from the signal generating circuit 125. The multiplying circuit 128 multiplies output signal of the multiplying circuit 124 by the carrier signal that has been delayed by .pi./2 and received from the signal generating circuit 125.
Output data of the multiplying circuit 127 and output data of the multiplying circuit 128 are supplied to an adding circuit 129. The adding circuit 129 adds the output data of the multiplying circuit 127 and the output data of the multiplying circuit 128. Output data of the adding circuit 129 is obtained from an output terminal 130.
Thus, when a signal is modulated corresponding to the BQPSK method and spectrum-spread, input data is separated into two portions on the transmitter side. The PN code generating circuits 121 and 122 multiply separated data portions by PN codes PNI and PNQ, respectively.
When a signal that has been modulated corresponding to the BQPSK method and spectrum-spread is received, as shown in FIG. 1, the received signal is orthogonally detected. A signal of I channel and a signal of Q channel are detected and multiplied by a PN code of I channel PNI and a PN code of Q channel PNQ.
In other words, FIG. 2 shows a conventional de-spreading process performed when a signal is received. In FIG. 2, a signal is received from an input terminal 151. The received signal is supplied to a multiplying circuit 152. In addition, the received signal is supplied to a multiplying circuit 153. An output signal of a signal generating circuit 154 is supplied to the multiplying circuit 152. The signal generating circuit 154 generates a signal with the same frequency as a carrier frequency of the signal received from the input terminal 151. A signal with the same frequency as the carrier frequency of the received signal is supplied from the signal generating circuit 154 to the multiplying circuit 153 through a .pi./2 delaying circuit 155.
The multiplying circuits 152 and 153, the signal generating circuit 154, and the .pi./2 delaying circuit 155 form a semi-synchronous detecting circuit. The semi-synchronous detecting circuit causes the multiplying circuits 152 and 153 to output a signal of I channel and a signal of Q channel, respectively. An output signal of the multiplying circuit 152 is supplied to a multiplying circuit 158 through a low l-ass filter 156. An output signal of the multiplying circuit 153 is supplied to a multiplying circuit 159 through a low pass filter 157.
A PN code generating circuit 160 supplies a PN code of I channel PNI to the multiplying circuit 158. A PN code generating circuit 161 supplies a PN code of Q channel PNQ to the multiplying circuit 159. The multiplying circuit 158 de-spreads data of I channel. The de-spread output data is obtained from an output terminal 163 through a low pass filter 162. The multiplying circuit 159 de-spreads data of Q channel. The de-spread output data is obtained from an output terminal 165 through a low pass filter 164.
Thus, when a signal that has been modulated corresponding to the BQPSK modulation and that has been and spectrum-spread is received, the received signal is orthogonally detected by the semi-synchronous detecting circuit. Thus, the received signal is separated into signals of two channels. The PN codes PNI and PNQ of the PN code generating circuits 158 and 159 are separately multiplied and thereby de-spread. In such a process, when a signal is transmitted, it is calculated on a real plane. In contrast, when a signal is received, it is converted into a complex signal by the semi-synchronous detecting process. Thus, strictly speaking, the received signal is not de-spread.
In other words, on the transmitter side, a signal is spread on a real plane. On the other hand, on the receiver side, a received signal is orthogonally detected by the semi-synchronous detecting process and converted into a complex signal. Thus, the PN code of I channel PNI and the PN code of Q channel PNQ that are real numbers are multiplied by an output signal that is a complex signal of the semi-synchronous detecting circuit. When a real signal is multiplied by a complex signal, the de-spreading process is not performed.
To solve this problem, the applicant of the present invention has proposed a method of which a signal is multiplied by a complex conjugate and thereby de-spread on the receiver side. In other words, considering that all signals are complex numbers, a spreading process is equivalent to a process of which multiplications of complex numbers of PNI and PNQ cause the phases of signalls to be rotated. Thus, to de-spread signals, the phases thereof are inversely rotated.
A signal that has been detected by the semi-synchronous detecting process is treated as a complex number EQU I+jQ.
A PN sequence used for the de-spreading process is represented by a complex number EQU PNI+jPNQ.
The de-spreading process is equivalent to a process of which the phases of signals are inversely rotated.
Thus, the signals are multiplied by a complex conjugate of the PN code. In other words, the following relation is obtained. ##EQU1##
Thus, after the I signal and the Q signal have been de-spread, the following results are obtained. ##EQU2##
With the above-described calculations, the de-spreading process corresponding to the balanced QPSK method is completed. Thus, when a circuit performs the calculations of the above-described expressions, the de-spreading process can be performed.
FIG. 3 shows the structure of a circuit that performs a de-spreading process corresponding to the calculations of the above-described expressions.
In FIG. 3, a signal received from an input terminal 171 is supplied to a multiplying circuit 172 and a multiplying circuit 173. An output signal of a signal generating circuit 174 is supplied to the multiplying circuit 172. The output signal of the signal generating circuit 174 is supplied to the multiplying circuit 173 through a .pi./2 delaying circuit 175.
The multiplying circuits 172 and 173, the signal generating circuit 174, and the .pi./2 delaying circuit 175 form a semi-synchronous detecting circuit. The semi-synchronous detecting circuit causes the multiplying circuits 172 and 173 to output a signal of I channel and a signal of Q channel, respectively.
An output signal of the multiplying circuit 172 is supplied to a multiplying circuit 178 through a low pass filter 176. In addition, the output signal of the multiplying circuit 172 is supplied to a multiplying circuit 179 through thw low pass filter 176. An output signal of the multiplying circuit 173 is supplied to a multiplying circuit 180 through a low pass filter 177. In addition, the output signal of the multiplying circuit 173 is supplied to a multiplying circuit 181 through the low pass filter 177.
A PN code generating circuit 182 outputs a PN code of I channel PNI. The PN code of I channel PNI is supplied to the multiplying circuit 178 and the multiplying circuit 180. A PN code generating circuit 183 outputs a PN code of Q channel PNQ. The PN code of Q channel PNQ is supplied to the multiplying circuit 179 and the multiplying circuit 181.
Output signals of the multiplying circuits 178 and 181 are supplied to an adding circuit 184. An output signal of the adding circuit 184 is obtained as a de-spread output signal of I channel from an output terminal 186. Output signals of the multiplying circuits 180 and 179 are supplied to a subtracting circuit 185. An output signal of the subtracting circuit 185 is obtained as a de-spread output signal of Q channel from an output terminal 187.
Thus, the semi-synchronous detecting circuit composed of the multiplying circuits 172 and 173, the signal generating circuit 174, and the .pi./2 delaying circuit 175 separates the received signal into a signal of I channel and a signal of Q channel. The signal of I channel is supplied to the multiplying circuits 178 and 179. The signal of Q channel is supplied to the multiplying circuits 180 and 181. The PN code PNI received from the PN code generating circuit 182 is supplied to the multiplying circuits 178 and 180. The code PNQ received from the PN code generating circuit 183 is supplied to the multiplying circuits 179 and 181.
When the received signals of P and Q channels are denoted by P and Q, respectively, the multiplying circuits 178 and 180 output a signal I.multidot.PNI and a signal Q.multidot.PNI, respectively. The multiplying circuit 179 outputs a signal I.multidot.PNQ. The multiplying circuit 181 outputs a signal Q.multidot.PNQ.
The adding circuit 184 adds the output signal I.multidot.PNI of the multiplying circuit 178 and the output signal Q.multidot.PNQ of the multiplying circuit 181. The output signal (I.multidot.PNI+Q.multidot.PNQ) of the adding circuit 184 is obtained as a de-spread output signal of I channel from the output terminal 186.
The subtracting circuit 185 subtracts the output signal Q.multidot.PNI of the multiplying circuit 180 from the output signal I.multidot.PNQ of the multiplying circuit 179. The output signal (Q.multidot.PNI-I.multidot.PNQ) of the subtracting circuit 185 is obtained as a de-spread output signal of Q channel from the output terminal 187.
However, when a signal is multiplied by a complex conjugate and thereby de-spread, at least four multiplying circuits 178 to 181, adding circuit 184, and subtracting circuit 185 are required. Thus, the circuit scale becomes large.